Timeline



Jan 28, 2018:

5:05 PM Ticket #54 (Design test wafer 1) created by leviathanch
Contains: * Standard gates (from hsank) * Basic discrete MOS transistors
4:55 PM Ticket #53 (Specify 1um process HKUST) created by leviathanch
Specify the process for HKUST based on their example: …
4:54 PM Ticket #52 (Generic process spec) created by leviathanch
Spec of the generic process …
4:52 PM Ticket #51 (Standard gates) created by leviathanch
Defining the default logic gates for 1 um for LibreSilicon
1:18 PM North Point created by leviathanch
1:17 PM WikiStart edited by leviathanch
(diff)
12:57 PM LibreSilicon created by leviathanch
11:27 AM Libresilicon process created by leviathanch
11:26 AM WikiStart edited by leviathanch
(diff)

Jan 24, 2018:

4:10 PM Ticket #50 (Defining test-revision 0.1) created by leviathanch
Defining the first testable LibreSilicon process 180nm version for …
4:04 PM QtFlow edited by leviathanch
(diff)

Jan 23, 2018:

5:25 PM WikiStart edited by lzycedric@…
(diff)

Jan 14, 2018:

10:02 AM Ticket #49 (google test) closed by andreas.westerwick@…
invalid
2:00 AM Ticket #49 (google test) created by andreas.westerwick@…
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